Stack

The Stack module implements a dedicated hardware stack for the B32P3 CPU, providing push and pop operations fast register backup and restoration. Note that there is no direct addressing of stack entries, and no warning is given for stack overflows or underflows.

Module Declaration

module Stack (
    input wire          clk,        // System clock
    input wire          reset,      // Reset signal

    input wire  [31:0]  d,          // Data to push onto stack
    output wire [31:0]  q,          // Data popped from stack
    input wire          push,       // Push operation enable
    input wire          pop,        // Pop operation enable

    input wire          clear,      // Clear/flush signal
    input wire          hold        // Hold/stall signal
);

Stack Architecture

Memory Organization

Parameter	Value
Width	32 bits per entry
Depth	128 words (512 Bytes)
Addressing	Internal 7-bit pointer
Growth	Upward (incrementing addresses)

Memory Structure

reg [31:0] stack [127:0];  // Stack memory array
reg [6:0]  ptr = 7'd0;     // Stack pointer

The stack memory is designed to infer as Block RAM on FPGA.

Stack Operations

Push Operation

When push is asserted:

Store data d at current stack pointer location
Increment stack pointer

Pop Operation

When pop is asserted:

Read data from stack pointer - 1
Decrement stack pointer
Output data on q

Control Signal Handling

clear: Outputs zero (creates pipeline bubble)
hold: Maintains current output and pointer (for stalls)