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FPGC Wiki

SDRAM

bartpleiter/FPGC

FPGC Wiki

bartpleiter/FPGC

FPGC
System overview
System overview
- Specifications
- Architecture
Hardware
Hardware
- CPU (B32P2)
  CPU (B32P2)
  - CPU (B32P2)
  - Architecture diagrams
  - Modules
    Modules
    
    ALU
    
    Address decoder
    
    Branch and Jump Unit
    
    Control Unit
    
    Instruction Decoder
    
    Multi-Cycle ALU
    
    Register Bank
    
    Pipeline Register (Regr)
    
    Stack
  - ISA
  - Cache
- GPU (FSX2)
- Memory
  Memory
  - Memory Unit
  - Memory Map
  - ROM
  - VRAM
  - SDRAM
  - MIG 7
  - SPI Flash
  - SD Card
- IO
  IO
  - SPI
  - Special Registers
  - Timers
  - UART
  - USB Host
- FPGA
- PCB
  PCB
  - PCB
Software
Software
- Assembler (ASMPY)
- Bootloaders
- C compiler
  C compiler
  - C Compiler
- Libraries
  Libraries
  - Libraries
- OS
  OS
  - OS (BDOS)
- Programs
  Programs
  - Programs
Development
Development
- Simulation
- Build scripts
  Build scripts
  - Programmer
  - Python environment
- Vivado
  Vivado
  - Vivado
Physical design
Physical design
- Case
  Case
  - Case
- Monitor
  Monitor
  - Monitor
Getting started
Getting started

SDRAM

TODO